Repository Issue Activity (beta)

#1216 Use `assert x.size(0) == y.size(1)` to unify shape symbols

#3216 Pretuned Benchmark Tracker Issue

#3309 Rewrote Mamba SSM kernels using Helion

#3269 Nightly Benchmark Tracker Issue

#3271 [benchmark] Upgrade MI350X jobs to PyTorch 2.14 when available

#3163 can helion support in-tile reshape for quantization casting?

#3177 autotuning does't work for nvfp4 cast with inline asm

#3176 autotuning does not work on large tensor + swizzling

#3001 Broadcast store writes only one chunk under looped reduction

#3161 Autotuner NoConfigFound on RTX 5090 (Blackwell sm_120) — manual configs work fine

#3024 [Dist Kernel] Log pollution from ProcessGroupNameNotFound

#2468 Optimize fixed launch overheads

#3118 Optimize Helion compile overhead

#3066 Change back to nvidia CI machines after they're fixed.

#3044 Support mismatched Tensor in control flow based on constexpr

#3029 PLDI Tutorial

#2972 Add failure tracking for benchmark

#2705 Same autotuned "static_ranges" config fails across different specialized shapes

#2745 [RFC] Helion Remote Autotuning Service

#2842 [Pallas] adjust_block_size_constraints max-propagates per-tensor TPU alignment across all tile-indexed tensors sharing a block_id

#2643 [Bug][CodeGen] CodeGen compilation error for reduction along non-tiled dimension

#2304 [Pallas] test_atomic_add_w_tile_attr broken with recent torch_tpu

#97 Support TensorDescriptor + extra_mask

#2531 Compile-phase subprocess isolation to survive Triton C++ aborts

#2469 Support subprocess benchmarking for non-picklable epilogue arguments